| 9437470 |
Self-aligned trench isolation in integrated circuits |
Ching-Huang Lu, Kenichi Ohtsuka, Simon S. Chan, Rinji Sugino |
2016-09-06 |
| 9431503 |
Integrating transistors with different poly-silicon heights on the same die |
Chuan Lin, Hidehiko Shiraiwa, Bradley Marc Davis, Simon S. Chan, Kenichi Ohtsuka +2 more |
2016-08-30 |
| 9362293 |
CT-NOR differential bitline sensing architecture |
Hagop Nazarian, Richard Fastow |
2016-06-07 |
| 9252026 |
Buried trench isolation in integrated circuits |
Rinji Sugino, Ching-Huang Lu, Simon S. Chan |
2016-02-02 |
| 9252154 |
Non-volatile memory with silicided bit line contacts |
Ching-Huang Lu, Simon S. Chan, Hidehiko Shiraiwa |
2016-02-02 |
| 9245895 |
Oro and orpro with bit line trench to suppress transport program disturb |
Ning Cheng, Kuo-Tung Chang, Hiro Kinoshita, Chih-Yuh Yang, Chungho Lee +3 more |
2016-01-26 |
