Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9442849 | Apparatus and method for reduced core entry into a power state having a powered down core cache | David Keppel, Kelvin Kwan | 2016-09-13 |
| 9354694 | Controlling processor consumption using on-off keying having a maximum off time | David Keppel | 2016-05-31 |
| 9342403 | Method and apparatus for managing a spin transfer torque memory | David Keppel, Helia Naeimi | 2016-05-17 |
| 9329658 | Block-level sleep logic | David Keppel | 2016-05-03 |
| 9280190 | Method and systems for energy efficiency and energy conservation including on-off keying for power control | Kelvin Kwan, David R. Ditzel, Vjekoslav Svilan | 2016-03-08 |
| 9229872 | Semiconductor chip with adaptive BIST cache testing during runtime | Christopher B. Wilkerson, Kelvin Kwan | 2016-01-05 |