Issued Patents 2016
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9501609 | Selection of corners and/or margins using statistical static timing analysis of an integrated circuit | Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shurma +3 more | 2016-11-22 |
| 9483604 | Variable accuracy parameter modeling in statistical timing | Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma +2 more | 2016-11-01 |
| 9436791 | Optimizing placement of circuit resources using a globally accessible placement memory | David J. Hathaway, Nathaniel D. Hieter, Shyam Ramji | 2016-09-06 |
| 9418188 | Optimizing placement of circuit resources using a globally accessible placement memory | David J. Hathaway, Nathaniel D. Hieter, Shyam Ramji | 2016-08-16 |
| 9418201 | Integration of functional analysis and common path pessimism removal in static timing analysis | Peter C. Elmendorf, Kerim Kalafala, Stephen G. Shuma | 2016-08-16 |