Issued Patents 2016
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9513565 | Using wafer geometry to improve scanner correction effectiveness for overlay control | Craig MacNaughton, Sathish Veeraraghavan, Pradeep Vukkadala, Jaydeep Sinha | 2016-12-06 |
| 9373165 | Enhanced patterned wafer geometry measurements based design improvements for optimal integrated chip fabrication performance | Pradeep Vukkadala, Craig MacNaughton, Jaydeep Sinha | 2016-06-21 |