VS

Vijayalakshmi Srinivasan

IBM: 13 patents #233 of 10,295Top 3%
📍 New York, NY: #19 of 2,096 inventorsTop 1%
🗺 New York: #183 of 11,723 inventorsTop 2%
Overall (2016): #3,478 of 481,213Top 1%
13
Patents 2016

Issued Patents 2016

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
9529723 Methods of cache preloading on a partition or a context switch Harold W. Cain, III, Jason D. Zebchuk 2016-12-27
9448835 Thread-based cache content saving for task switching Harold W. Cain, III, David M. Daly, Brian R. Prasky 2016-09-20
9436501 Thread-based cache content saving for task switching Harold W. Cain, III, David M. Daly, Brian R. Prasky 2016-09-06
9431084 Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM) Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C. Hunter, Jude A. Rivers 2016-08-30
9430240 Pre-computation slice merging for prefetching in a computer processor Islam Mohamed Hatem Abdulfattah Mohamed Atta, Ioana M. Baldini Soares, Kailash Gopalakrishnan 2016-08-30
9424192 Private memory table for reduced memory coherence traffic David M. Daly 2016-08-23
9418721 Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM) Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C. Hunter, Jude A. Rivers 2016-08-16
9411730 Private memory table for reduced memory coherence traffic David M. Daly 2016-08-09
9406368 Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM) Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C. Hunter, Jude A. Rivers 2016-08-02
9351899 Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM) Pradip Bose, Alper Buyuktosunoglu, Xiaochen Guo, Hillery C. Hunter, Jude A. Rivers 2016-05-31
9323676 Non-data inclusive coherent (NIC) directory for cache Timothy C. Bronson, Garrett M. Drapala, Rebecca M. Gott, Pak-kin Mak, Craig R. Walters 2016-04-26
9298466 Multi-threaded processor instruction balancing through instruction uncertainty Alper Buyuktosunoglu, Brian R. Prasky 2016-03-29
9292445 Non-data inclusive coherent (NIC) directory for cache Timothy C. Bronson, Garrett M. Drapala, Rebecca M. Gott, Pak-kin Mak, Craig R. Walters 2016-03-22