Issued Patents 2016
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9455195 | Method of forming performance optimized gate structures by silicidizing lowered source and drain regions | Paul Chang, Jian-Shen Yu | 2016-09-27 |
| 9240482 | Asymmetric stressor DRAM | Ravi K. Dasaka, Shreesh Narasimha, Ahmed Nayaz Noemaun, Karen A. Nummy, Paul C. Parries +3 more | 2016-01-19 |