EC

Edgar R. Cordero

IBM: 14 patents #216 of 10,295Top 3%
Globalfoundries: 1 patents #828 of 2,145Top 40%
Overall (2016): #2,856 of 481,213Top 1%
15
Patents 2016

Issued Patents 2016

Patent #TitleCo-InventorsDate
9501432 System and method for computer memory with linked paths Girisankar Paulraj, Diyanesh B. Chinnakkonda Vidyapoornachary 2016-11-22
9471540 Detecting TSV defects in 3D packaging Anand Haridass, Girisankar Paulraj, Diyanesh B. Vidyapoornachary 2016-10-18
9471239 Memory power management and data consolidation Diyanesh B. Chinnakkonda Vidyapoornachary, Anand Haridass, Arun Joseph 2016-10-18
9442816 Implementing memory performance management and enhanced memory reliability accounting for thermal conditions Timothy J. Dell, Joab D. Henderson, Anil B. Lingambudi, Girisankar Paulraj, Diyanesh Babu C. Vidyapoornachary 2016-09-13
9418722 Prioritizing refreshes in a memory device Joab D. Henderson, Kyu-hyoun Kim, Jeffrey A. Sabrowski, Anuwat Saetow 2016-08-16
9348744 Implementing enhanced reliability of systems utilizing dual port DRAM Carlos A. Fernandez, Joab D. Henderson, Jeffrey A. Sabrowski, Anuwat Saetow, Saravanan Sethuraman 2016-05-24
9349432 Reference voltage modification in a memory device Joab D. Henderson, Kyu-hyoun Kim, Jeffrey A. Sabrowski, Anuwat Saetow 2016-05-24
9329648 Performance management of subsystems in a server by effective usage of resources Diyanesh Babu Vidyapoornachary Chinnakkonda, Timothy J. Dell, Joab D. Henderson, Anil B. Lingambudi, Girisankar Paulraj 2016-05-03
9305618 Implementing simultaneous read and write operations utilizing dual port DRAM Carlos A. Fernandez, Joab D. Henderson, Jeffrey A. Sabrowski, Anuwat Saetow, Saravanan Sethuraman 2016-04-05
9305619 Implementing simultaneous read and write operations utilizing dual port DRAM Carlos A. Fernandez, Joab D. Henderson, Jeffrey A. Sabrowski, Anuwat Saetow, Saravanan Sethuraman 2016-04-05
9300298 Programmable logic circuit using three-dimensional stacking techniques Robert B. Tremaine 2016-03-29
9252131 Chip stack cache extension with coherency Anand Haridass, Subrat K. Panda, Saravanan Sethuraman, Diyanesh Babu C. Vidyapoornachary 2016-02-02
9251054 Implementing enhanced reliability of systems utilizing dual port DRAM Carlos A. Fernandez, Joab D. Henderson, Jeffrey A. Sabrowski, Anuwat Saetow, Saravanan Sethuraman 2016-02-02
9245604 Prioritizing refreshes in a memory device Joab D. Henderson, Kyu-hyoun Kim, Jeffrey A. Sabrowski, Anuwat Saetow 2016-01-26
9230687 Implementing ECC redundancy using reconfigurable logic blocks Timothy J. Dell, Joab D. Henderson, Jeffrey A. Sabrowski, Anuwat Saetow, Saravanan Sethuraman 2016-01-05