Issued Patents 2016
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9513335 | Method for using XOR trees for physically efficient scan compression and decompression logic | Steev Wilcox, Brian Foutz, Vivek Chickermane, Krishna Vijaya Chakravadhanula | 2016-12-06 |
| 9501590 | Systems and methods for testing integrated circuit designs | Steev Wilcox, Vivek Chickermane | 2016-11-22 |
| 9470754 | Elastic compression-optimizing tester bandwidth with compressed test stimuli using overscan and variable serialization | Vivek Chickermane, Krishna Vijaya Chakravadhanula, Brian Foutz, Steev Wilcox, David G. Scott +2 more | 2016-10-18 |
| 9470755 | Method for dividing testable logic into a two-dimensional grid for physically efficient scan | Brian Foutz, Steev Wilcox, Vivek Chickermane, Krishna Vijaya Chakravadhanula | 2016-10-18 |
| 9470756 | Method for using sequential decompression logic for VLSI test in a physically efficient construction | Steev Wilcox, Brian Foutz, Krishna Vijaya Chakravadhanula, Vivek Chickermane | 2016-10-18 |
| 9465896 | Systems and methods for testing integrated circuit designs | Steev Wilcox, Vivek Chickermane | 2016-10-11 |