ST

Shashank Tripathi

CS Cadence Design Systems: 1 patents #48 of 202Top 25%
Overall (2016): #227,368 of 481,213Top 50%
1
Patents 2016

Issued Patents 2016

Patent #TitleCo-InventorsDate
9405882 High performance static timing analysis system and method for input/output interfaces Amit Dhuria, Naresh Kumar, Prashant Sethia, Jeannette Sutherland 2016-08-02