Issued Patents 2011
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8064279 | Structure and method for screening SRAMS | Xiaowei Deng | 2011-11-22 |
| 8064275 | Local sensing and feedback for an SRAM array | Hugh Mair | 2011-11-22 |
| 8064271 | Static random access memory device having bit line voltage control for retain till accessed mode and method of operating the same | — | 2011-11-22 |
| 8018780 | Temperature dependent back-bias for a memory array | Andrew Marshall | 2011-09-13 |
| 7986566 | SRAM cell with read buffer controlled for low leakage current | — | 2011-07-26 |
| 7983071 | Dual node access storage cell having buffer circuits | — | 2011-07-19 |
| 7978004 | Body bias coordinator, method of coordinating a body bias and sub-circuit power supply employing the same | Andrew Marshall | 2011-07-12 |
| 7957178 | Storage cell having buffer circuit for driving the bitline | — | 2011-06-07 |
| 7936623 | Universal structure for memory cell characterization | Xiaowei Deng | 2011-05-03 |
| 7936589 | Adaptive voltage control for SRAM | — | 2011-05-03 |
| 7907456 | Memory having circuitry controlling the voltage differential between the word line and array supply voltage | Andrew Marshall | 2011-03-15 |
| 7894280 | Asymmetrical SRAM cell with separate word lines | — | 2011-02-22 |
| 7888192 | Process for forming integrated circuits with both split gate and common gate FinFET transistors | Andrew Marshall | 2011-02-15 |
| 7864600 | Memory cell employing reduced voltage | Donald George Mikan, Jr., Hugh Mair, Michael Patrick Clinton | 2011-01-04 |