Issued Patents 2011
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8086990 | Method of correlating silicon stress to device instance parameters for circuit simulation | Xi-Wei Lin, Dipankar Pramanik | 2011-12-27 |
| 8069430 | Stress-managed revision of integrated circuit layouts | Xi-Wei Lin, Dipankar Pramanik | 2011-11-29 |
| 8035168 | Elevation of transistor channels to reduce impact of shallow trench isolation on transistor performance | Dipankar Pramanik, Xi-Wei Lin | 2011-10-11 |
| 7996795 | Method and apparatus for performing stress modeling of integrated circuit material undergoing material conversion | Xiaopeng Xu | 2011-08-09 |
| 7968413 | Methods for forming a transistor | Faran Nouri, Lori D. Washington | 2011-06-28 |
| 7960232 | Methods of designing an integrated circuit on corrugated substrate | Tsu-Jae King | 2011-06-14 |
| 7949985 | Method for compensation of process-induced performance variation in a MOSFET integrated circuit | Dipankar Pramanik, Kishore Singhal, Xi-Wei Lin | 2011-05-24 |
| 7939862 | Stress-enhanced performance of a FinFet using surface/channel orientations and strained capping layers | Tsu-Jae King Liu | 2011-05-10 |
| 7926018 | Method and apparatus for generating a layout for a transistor | Xi-Wei Lin, Mark Rubin | 2011-04-12 |
| 7897479 | Managing integrated circuit stress using dummy diffusion regions | Xi-Wei Lin, Dipankar Pramanik | 2011-03-01 |
| 7863146 | Elevation of transistor channels to reduce impact of shallow trench isolation on transistor performance | Dipankar Pramanik, Xi-Wei Lin | 2011-01-04 |