Issued Patents 2011
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8065651 | Implementing hierarchical design-for-test logic for modular circuit design | Anshuman Chandra, Yasunari Kanzawa, Jyotirmoy Saikia | 2011-11-22 |
| 7900105 | Dynamically reconfigurable shared scan-in test architecture | Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala +1 more | 2011-03-01 |