Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8051247 | Trace based deallocation of entries in a versioning cache circuit | John G. Favor, Graham Ricketson Murphy, Joseph B. Rowlands | 2011-11-01 |
| 8024522 | Memory ordering queue/versioning cache circuit | John G. Favor, Graham Ricketson Murphy, Joseph B. Rowlands | 2011-09-20 |
| 8019944 | Checking for a memory ordering violation after a speculative cache write | John G. Favor, Graham Ricketson Murphy, Joseph B. Rowlands | 2011-09-13 |
| 8010745 | Rolling back a speculative update of a non-modifiable cache line | John G. Favor, Graham Ricketson Murphy, Joseph B. Rowlands | 2011-08-30 |
| 7877630 | Trace based rollback of a speculatively updated cache | John G. Favor, Graham Ricketson Murphy, Joseph B. Rowlands | 2011-01-25 |