Issued Patents 2011
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8067286 | Methods of forming recessed access devices associated with semiconductor constructions | Suraj Mathew, Jigish Trivedi, John K. Zahurak, Sanh D. Tang | 2011-11-29 |
| 8030780 | Semiconductor substrates with unitary vias and via terminals, and associated systems and methods | Kyle K. Kirby | 2011-10-04 |
| 8013376 | Memory arrays, semiconductor constructions and electronic systems with transistor gates extending partially over SOI and unit cells within active region pedestals | — | 2011-09-06 |
| 7989307 | Methods of forming isolated active areas, trenches, and conductive lines in semiconductor structures and semiconductor structures including the same | John K. Zahurak | 2011-08-02 |
| 7968460 | Semiconductor with through-substrate interconnect | Kyle K. Kirby | 2011-06-28 |
| 7960765 | Method and apparatus for providing an integrated circuit having p and n doped gates | Chandra Mouli | 2011-06-14 |
| 7902028 | Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates | Young-Pil Kim | 2011-03-08 |
| 7897460 | Methods of forming recessed access devices associated with semiconductor constructions | Suraj Mathew, Jigish Trivedi, John K. Zahurak, Sanh D. Tang | 2011-03-01 |
| 7897485 | Wafer processing including forming trench rows and columns at least one of which has a different width | — | 2011-03-01 |