Issued Patents 2011
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8062942 | Method for fabricating multi-resistive state memory devices | Darrell Rinerson, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia, Steven W. Longcor +2 more | 2011-11-22 |
| 8031545 | Low read current architecture for memory | Darrell Rinerson, Chang Hua Siau | 2011-10-04 |
| 7995371 | Threshold device for a memory array | Darrell Rinerson, Julie Casperson Brewer, Wayne Kinney, Roy Lambertson, Lawrence Schloss | 2011-08-09 |
| 7985963 | Memory using variable tunnel barrier widths | Darrell Rinerson, Wayne Kinney, Edmond R. Ward | 2011-07-26 |
| 7978501 | Method for contemporaneous margin verification and memory access for memory cells in cross-point memory arrays | Chang Hua Siau | 2011-07-12 |
| 7952631 | CMOS imager with integrated circuitry | — | 2011-05-31 |
| 7898841 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Robert Norman | 2011-03-01 |
| 7889539 | Multi-resistive state memory device with conductive oxide electrodes | Darrell Rinerson, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia, Steven W. Longcor +2 more | 2011-02-15 |
| 7884349 | Selection device for re-writable memory | Darrell Rinerson, Steve Kuo-Ren Hsia, Steven W. Longcor, Wayne Kinney, Edmond R. Ward | 2011-02-08 |