Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8019566 | System and method for efficiently testing cache congruence classes during processor design verification and validation | Vinod Bussa, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Batchu Naga Venkata Satyanarayana | 2011-09-13 |
| 8006221 | System and method for testing multiple processor modes for processor design verification and validation | Sampan Arora, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Sai Rupak Mohanan | 2011-08-23 |
| 7992059 | System and method for testing a large memory area during processor design verification and validation | Divya S. Anvekar, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor | 2011-08-02 |