Issued Patents 2011
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8046566 | Method to reduce power consumption of a register file with multi SMT support | Christopher M. Abernathy, Nicolas Maeding, Dung Q. Nguyen | 2011-10-25 |
| 7962538 | Method of operand width reduction to enable usage of narrower saturation adder | Tobias Gemmeke, Nicolas Maeding, Kerstin Claudia Schelm | 2011-06-14 |
| 7913132 | System and method for scanning sequential logic elements | Tobias Gemmeke, Dieter Wendel, Holger Wetter | 2011-03-22 |
| 7890901 | Method and system for verifying the equivalence of digital circuits | Tobias Gemmeke, Nicolas Maeding, Hari Mony | 2011-02-15 |