Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8006213 | Optimization method of integrated circuit design for reduction of global clock load and balancing clock skew | Jose L. Neves, Charlie C. Hwang, David W. Lewis | 2011-08-23 |
| 7987400 | Method for optimizing scan chains in an integrated circuit that has multiple levels of hierarchy | Lawrence D. Curley, Patrick J. Meaney, Diana L. Orf | 2011-07-26 |
| 7979838 | Method of automating creation of a clock control distribution network in an integrated circuit floorplan | Jose L. Neves, Lawrence D. Curley, Patrick J. Meaney, Travis W. Pouarz, William J. Scarpero, Jr. | 2011-07-12 |
| 7921399 | Method for simplifying tie net modeling for router performance | Michael Alexander Bowen | 2011-04-05 |
| 7882322 | Early directory access of a double data rate elastic interface | Jonathan Y. Chen, Michael Fee, Patrick J. Meaney, Alan P. Wagstaff | 2011-02-01 |