Issued Patents 2011
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7956417 | Method of reducing stacking faults through annealing | Yun-Yu Wang, Anthony G. Domenicucci, Linda Black, Judson R. Holt, David M. Fried | 2011-06-07 |
| 7911024 | Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof | Herbert L. Ho, Mahender Kumar, Qiqing C. Ouyang, Paul A. Papworth, Michael D. Steigerwalt | 2011-03-22 |
| 7893493 | Stacking fault reduction in epitaxially grown silicon | Yun-Yu Wang, Linda Black, Judson R. Holt, Woo-Hyeong Lee, Scott Luning | 2011-02-22 |
| 7871893 | Method for non-selective shallow trench isolation reactive ion etch for patterning hybrid-oriented devices compatible with high-performance highly-integrated logic devices | Gregory Costrini, David M. Dobuzinsky, Thomas S. Kanarsky, Munir D. Naeem, Richard S. Wise | 2011-01-18 |