TS

Taber H. Smith

CS Cadence Design Systems: 2 patents #27 of 259Top 15%
📍 Saratoga, CA: #155 of 561 inventorsTop 30%
🗺 California: #7,487 of 41,698 inventorsTop 20%
Overall (2011): #63,501 of 364,097Top 20%
2
Patents 2011

Issued Patents 2011

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8001516 Characterization and reduction of variation for integrated circuits Vikas Mehrotra, David White 2011-08-16
7962867 Electronic design for integrated circuits based on process related variations David White 2011-06-14