DW

David White

CS Cadence Design Systems: 5 patents #2 of 259Top 1%
📍 San Jose, CA: #212 of 4,297 inventorsTop 5%
🗺 California: #1,934 of 41,698 inventorsTop 5%
Overall (2011): #18,243 of 364,097Top 6%
5
Patents 2011

Issued Patents 2011

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
8001512 Method and system for implementing context simulation 2011-08-16
8001516 Characterization and reduction of variation for integrated circuits Taber H. Smith, Vikas Mehrotra 2011-08-16
7962866 Method, system, and computer program product for determining three-dimensional feature characteristics in electronic designs Louis K. Scheffer 2011-06-14
7962867 Electronic design for integrated circuits based on process related variations Taber H. Smith 2011-06-14
7937674 Method, system, and computer program product for predicting thin film integrity, manufacturability, reliability, and performance in electronic designs Louis K. Scheffer 2011-05-03