PG

Patrick Gallagher

CS Cadence Design Systems: 3 patents #7 of 259Top 3%
📍 Apalachin, NY: #1 of 14 inventorsTop 8%
🗺 New York: #1,093 of 10,473 inventorsTop 15%
Overall (2011): #39,099 of 364,097Top 15%
3
Patents 2011

Issued Patents 2011

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
8001433 Scan testing architectures for power-shutoff aware systems Sandeep Bhatia, Brian Foutz, Vivek Chickermane 2011-08-16
7979764 Distributed test compression for integrated circuits Brian Foutz, Vivek Chickermane, Carl Barnhart 2011-07-12
7926012 Design-For-testability planner Nitin Parimi, Brian Foutz, Vivek Chickermane 2011-04-12