TH

Takuya Hasumi

AD Advantest: 2 patents #14 of 142Top 10%
Overall (2011): #64,371 of 364,097Top 20%
2
Patents 2011

Issued Patents 2011

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8058891 Delay lock loop circuit, timing generator, semiconductor test device, semiconductor integrated circuit, and delay amount calibration method Masakatsu Suda 2011-11-15
7987062 Delay circuit, test apparatus, storage medium semiconductor chip, initializing circuit and initializing method Kazuhiro Fujita, Masakatsu Suda 2011-07-26