YK

Yaron Kashai

VE Verisity: 2 patents #1 of 4Top 25%
📍 Sunnyvale, CA: #153 of 1,070 inventorsTop 15%
🗺 California: #3,616 of 26,868 inventorsTop 15%
Overall (2005): #28,777 of 245,428Top 15%
2
Patents 2005

Issued Patents 2005

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6920583 System and method for compiling temporal expressions Matthew John Morley 2005-07-19
6907599 Synthesis of verification languages Matthew John Morley 2005-06-14