Issued Patents 2005
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6968400 | Local memory with indicator bits to support concurrent DMA and CPU access | — | 2005-11-22 |
| 6934820 | Traffic controller using priority and burst control for reducing access latency | Gerard Chauvel, Dominique D'Inverno | 2005-08-23 |
| 6851072 | Fault management and recovery based on task-ID | Gerard Chauvel | 2005-02-01 |