Issued Patents 2005
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6931295 | Method and system of calculating lot hold time | Chun-Hung Lin | 2005-08-16 |
| 6931296 | Algorithms tunning for dynamic lot dispatching in wafer and chip probing | Yi-Feng Huang, Fu-Kang Lai, Jen-Chih Hsiao | 2005-08-16 |
| 6876894 | Forecast test-out of probed fabrication by using dispatching simulation method | Nai-Chiang Chen, Joseph Chang, Chung-Shen Chen, Vincent Chiu | 2005-04-05 |