Issued Patents 2005
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6978430 | Methods and apparatuses for designing integrated circuits | Robert Erickson | 2005-12-20 |
| 6973632 | Method and apparatus to estimate delay for logic circuit optimization | Dhananjay Brahme, Jovanka Ciric | 2005-12-06 |
| 6934183 | Method and apparatus for resetable memory and design approach for same | Vijay Seshadri | 2005-08-23 |
| 6904576 | Method and system for debugging using replicated logic | Chun Kit Ng | 2005-06-07 |