Issued Patents 2005
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6871330 | Method and device for characterizing a CMOS logic cell to be produced in a technology of the partially depleted silicon-on-insulator type | Mario Casu | 2005-03-22 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6871330 | Method and device for characterizing a CMOS logic cell to be produced in a technology of the partially depleted silicon-on-insulator type | Mario Casu | 2005-03-22 |