Issued Patents 2005
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6917085 | Semiconductor transistor using L-shaped spacer | Geum-Jong Bae, Hwa-Sung Rhee, Young-Gun Ko, Tae-Hee Choe, Sang-Su Kim | 2005-07-12 |
| 6914301 | CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Hwa-Sung Rhee, Kyung Wook Lee | 2005-07-05 |
| 6884705 | Semiconductor device having hetero grain stack gate and method of forming the same | Hwa-Sung Rhee, Jung-Il Lee, Sang-Su Kim, Bae Geum Jong | 2005-04-26 |
| 6881650 | Method for forming SOI substrate | Jung-Il Lee, Kazuyuki Fujihara, Geum-Jong Bae, Hwa-Sung Rhee, Sang-Su Kim | 2005-04-19 |
| 6881621 | Method of fabricating SOI substrate having an etch stop layer, and method of fabricating SOI integrated circuit using the same | Tae-Hee Choe, Geum-Jong Bae, Sang-Su Kim, Hwa-Sung Rhee | 2005-04-19 |
| 6878580 | Semiconductor device having gate with negative slope and method for manufacturing the same | Geum-Jong Bae, Ki-Chul Kim, Hwa-Sung Rhee, Sang-Su Kim, Jung-Il Lee | 2005-04-12 |
| 6875678 | Post thermal treatment methods of forming high dielectric layers in integrated circuit devices | Hyung-Suk Jung, Jong Ho Lee, Yun Seok Kim | 2005-04-05 |
| 6844604 | Dielectric layer for semiconductor device and method of manufacturing the same | Jongho Lee | 2005-01-18 |