CH

Chaofeng Huang

TR Tram: 3 patents #4 of 14Top 30%
RA Rambus: 1 patents #43 of 79Top 55%
📍 San Jose, CA: #153 of 2,758 inventorsTop 6%
🗺 California: #1,188 of 26,868 inventorsTop 5%
Overall (2005): #13,419 of 245,428Top 6%
4
Patents 2005

Issued Patents 2005

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6977980 Timing synchronization methods and systems for transmit parallel interfaces Kun-Yung Chang 2005-12-20
6975260 Geometric D/A converter for a delay-locked loop Shahram Abdollahi-Alibeik 2005-12-13
6947349 Apparatus and method for producing an output clock pulse and output clock generator using same Shahram Abdollahi-Alibeik 2005-09-20
6891774 Delay line and output clock generator using same Shahram Abdollahi-Alibeik 2005-05-10