Issued Patents 2005
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6960952 | Configuring and selecting a duty cycle for an output driver | Huy M. Nguyen, Chuen Chou | 2005-11-01 |
| 6960948 | System with phase jumping locked loop circuit | Jade M. Kizer, Roxanne Vu, Craig E. Hampel | 2005-11-01 |
| 6954095 | Apparatus and method for generating clock signals | Stefanos Sidiropoulos | 2005-10-11 |
| 6952123 | System with dual rail regulated locked loop | Jade M. Kizer, Craig E. Hampel | 2005-10-04 |
| 6950956 | Integrated circuit with timing adjustment mechanism and method | Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more | 2005-09-27 |
| 6924660 | Calibration methods and circuits for optimized on-die termination | Huy M. Nguyen, Vijay Gadde | 2005-08-02 |
| 6911853 | Locked loop with dual rail regulation | Jade M. Kizer | 2005-06-28 |
| 6897713 | Method and apparatus for distributed voltage compensation with a voltage driver that is responsive to feedback | Huy M. Nguyen, Adam Chuen-Huei Chou, Roxanne Vu | 2005-05-24 |
| 6897699 | Clock distribution network with process, supply-voltage, and temperature compensation | Huy M. Nguyen, Roxanne Vu | 2005-05-24 |
| 6876248 | Signaling accommodation | Huy M. Nguyen | 2005-04-05 |
| 6861884 | Phase synchronization for wide area integrated circuits | Huy M. Nguyen, Leung Yu, Jade M. Kizer | 2005-03-01 |