Issued Patents 2005
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6892367 | Vertex based layout pattern (VEP): a method and apparatus for describing repetitive patterns in IC mask layout | Michal Palusinski, Mariusz Niewczas, Wojciech P. Maly, Andrezej Strojwas, Hans Eisenmann | 2005-05-10 |