Issued Patents 2005
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6981012 | Method and circuit for normalization of floating point significants in a SIMD array MPP | — | 2005-12-27 |
| 6948045 | Providing a register file memory with local addressing in a SIMD parallel processor | — | 2005-09-20 |
| 6912626 | Method and apparatus for connecting a massively parallel processor array to a memory array in a bit serial manner | — | 2005-06-28 |
| 6895424 | Method and circuit for alignment of floating point significants in a SIMD array MPP | — | 2005-05-17 |