JP

Jayanthi Pallinti

Lsi Logic: 2 patents #58 of 465Top 15%
🗺 California: #3,616 of 26,868 inventorsTop 15%
Overall (2005): #51,672 of 245,428Top 25%
2
Patents 2005

Issued Patents 2005

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6951808 Metal planarization system Samuel V. Dunton, Ronald J. Nagahara 2005-10-04
6838379 PROCESS FOR REDUCING IMPURITY LEVELS, STRESS, AND RESISTIVITY, AND INCREASING GRAIN SIZE OF COPPER FILLER IN TRENCHES AND VIAS OF INTEGRATED CIRCUIT STRUCTURES TO ENHANCE ELECTRICAL PERFORMANCE OF COPPER FILLER Byung Sung Kwak, William K. Barth 2005-01-04