Issued Patents 2005
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6961893 | Separable cyclic redundancy check | Manish Mahajan, Vasantha SRIRAMBHATLA, T.V.P. Kameswar Rao, Anjan Mitra | 2005-11-01 |
| 6901496 | Line rate buffer using single ported memories for variable length packets | Anjan Mitra | 2005-05-31 |
| 6885043 | ASIC routing architecture | Lyle Smith, Eric F. Dellinger, Eric T. West | 2005-04-26 |
| 6861867 | Method and apparatus for built-in self-test of logic circuits with multiple clock domains | Eric T. West | 2005-03-01 |