YJ

Yanbin Jiang

CS Cadence Design Systems: 1 patents #18 of 77Top 25%
📍 Moscow, CA: #1 of 4 inventorsTop 25%
Overall (2005): #73,725 of 245,428Top 35%
1
Patents 2005

Issued Patents 2005

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6968524 Method and apparatus to optimize an integrated circuit design using transistor folding Ilhami H. Torunoglu, Cyrus Bamji 2005-11-22