Issued Patents 2005
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6977409 | Flash memory having memory section and peripheral circuit section | Kikuko Sugimae, Masayuki Ichige, Atsuhiro Sato, Hiroaki Hazama | 2005-12-20 |
| 6967892 | Non-volatile semiconductor memory device and memory system using the same | Tomoharu Tanaka, Masaki Momodomi, Hideo Kato, Hiroto Nakai, Yoshiyuki Tanaka +8 more | 2005-11-22 |
| 6940752 | Nonvolatile semiconductor memory device | Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Fumitaka Arai, Susumu Fujimura | 2005-09-06 |
| 6927998 | Nonvolatile semiconductor memory device capable of reducing threshold voltage variations of memory cells due to capacitance coupling | Yuji Takeuchi | 2005-08-09 |
| 6927449 | Nonvolatile semiconductor memory device having element isolating region of trench type | Michiharu Matsui, Seiichi Mori, Yuji Takeuchi, Takeshi Kamigaichi | 2005-08-09 |
| 6925008 | Non-volatile semiconductor memory device with a memory unit including not more than two memory cell transistors | Masayuki Ichige, Kikuko Sugimae | 2005-08-02 |
| 6921960 | Capacitor element with an opening portion formed in a peripheral circuit | Masayuki Ichige, Kikuko Sugimae, Atsuhiro Sato, Yuji Takeuchi | 2005-07-26 |
| 6894341 | Semiconductor device and manufacturing method | Kikuko Sugimae, Hiroyuki Kutsukake, Masayuki Ichige, Michiharu Matsui, Yuji Takeuchi | 2005-05-17 |
| 6878985 | Nonvolatile semiconductor memory device having a memory cell that includes a floating gate electrode and control gate electrode | Fumitaka Arai, Toshitake Yaegashi, Akira Shimizu, Yasuhiko Matsunaga, Masayuki Ichige +1 more | 2005-04-12 |
| 6868010 | Semiconductor memory device having row decoder in which high-voltage-applied portion is located adjacent to low-voltage-applied portion | Akira Shimizu, Fumitaka Arai | 2005-03-15 |
| 6859394 | NAND type non-volatile semiconductor memory device | Yasuhiko Matsunaga, Toshitake Yaegashi, Fumitaka Arai | 2005-02-22 |
| 6853029 | Non-volatile semiconductor memory device with multi-layer gate structure | Masayuki Ichige, Yuji Takeuchi, Michiharu Matsui, Atsuhiro Sato, Kikuko Sugimae | 2005-02-08 |
| 6845042 | Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems | Masayuki Ichige, Koji Hashimoto, Tatsuaki Kuji, Seiichi Mori, Yuji Takeuchi +1 more | 2005-01-18 |