Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6963630 | Method for evaluating an SOI substrate, evaluation processor, and method for manufacturing a semiconductor device | Kaori Umezawa | 2005-11-08 |
| 6919260 | Method of manufacturing a substrate having shallow trench isolation | Kaori Umezawa, Yoshiaki Matsushita, Hiroyuki Kamijou, Atsushi Yagishita, Tsunehiro KITA | 2005-07-19 |