Issued Patents 2005
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6977846 | Non-volatile semiconductor memory device in which one page is set for a plurality of memory cell arrays | Koichi Kawai, Kenichi Imamiya, Hiroshi Nakamura | 2005-12-20 |
| 6972996 | Pattern layout of transfer transistors employed in row decoder | Hiroshi Nakamura, Kenichi Imamiya, Tomoharu Tanaka | 2005-12-06 |
| 6967874 | Non-volatile semiconductor memory device and electric device with the same | — | 2005-11-22 |
| 6937510 | Non-volatile semiconductor memory | Hiroshi Nakamura, Ken Takeuchi, Kenichi Imamiya | 2005-08-30 |
| 6907497 | Non-volatile semiconductor memory device | Kenichi Imamiya, Hiroshi Nakamura, Mikito Nakabayashi, Koichi Kawai | 2005-06-14 |
| 6903981 | Non-volatile semiconductor memory device, method for sub-block erase and electric device with the same | Takuya Futatsuyama, Kenichi Imamiya, Noboru Shibata | 2005-06-07 |
| 6891757 | Semiconductor memory device | Hiroshi Nakamura | 2005-05-10 |
| 6882569 | Non-volatile semiconductor memory device | Kenichi Imamiya, Hiroshi Nakamura | 2005-04-19 |
| 6879520 | Non-volatile semiconductor memory device and electric device with the same | Hiroshi Nakamura, Kenichi Imamiya | 2005-04-12 |
| 6865112 | Non-volatile semiconductor memory device in which one page is set for a plurality of memory cell arrays | Koichi Kawai, Kenichi Imamiya, Hiroshi Nakamura | 2005-03-08 |
| 6859401 | Fail number detecting circuit of flash memory | Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi | 2005-02-22 |
| 6839283 | Non-volatile semiconductor memory device with reduced chip real estate area for transfer transistors | Takuya Futatsuyama | 2005-01-04 |