Issued Patents 2005
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6978357 | Method and apparatus for performing cache segment flush and cache segment invalidation operations | Lance Hacking, Shreekant S. Thakkar, Thomas R. Huff, Hsien-Cheng E. Hsieh | 2005-12-20 |
| 6976099 | Selective interrupt delivery to multiple processors having independent operating systems | Varghese George, Edward Gamsaragan, Deep Buch, Paul Zagacki | 2005-12-13 |
| 6976131 | Method and apparatus for shared cache coherency for a chip multiprocessor or multiprocessor system | Vivek Garg, Narayanan Iyer, Jagannath Keshava | 2005-12-13 |
| 6970994 | Executing partial-width packed data instructions | Mohammad Abdallah, James S. Coke, Patrice Roussel, Shreekant S. Thakkar | 2005-11-29 |