Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6952118 | Gate-clocked domino circuits with reduced leakage current | Sudarshan Kumar | 2005-10-04 |
| 6914848 | Word line transistor stacking for leakage control | Sadarshan Kumar, Sadhana Madhyastha | 2005-07-05 |