Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6937075 | Method and apparatus for reducing lock time in dual charge-pump phase-locked loops | Chee How Lim, Rachael Parker | 2005-08-30 |
| 6934872 | Method and apparatus for optimizing clock distribution to reduce the effect of power supply noise | Hung-Piao Ma, Tawfik M. Rahal-Arabi, Javed S. Barkatullah, Edward A. Burton | 2005-08-23 |
| 6924710 | Voltage ID based frequency control for clock generating circuit | Hong-Piao Ma, Greg Taylor, Chee How Lim, Robert Greiner, Edward A. Burton +1 more | 2005-08-02 |
| 6919769 | Method and apparatus for fast lock acquisition in self-biased phase locked loops | Chee How Lim | 2005-07-19 |
| 6885233 | Altering operating frequency and voltage set point of a circuit in response to the operating temperature and instantaneous operating voltage of the circuit | Douglas Huard, Edward A. Burton | 2005-04-26 |
| 6876717 | Multi-stage programmable Johnson counter | Feng Wang | 2005-04-05 |
| 6842056 | Cascaded phase-locked loops | Cangsang Zhao, Chee How Lim | 2005-01-11 |