Issued Patents 2005
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6976095 | Port blocking technique for maintaining receive packet ordering for a multiple ethernet port switch | Debra Bernstein, Matthew J. Adiletta | 2005-12-13 |
| 6973550 | Memory access control | Mark Rosenbluth, Debra Bernstein, Richard Guerin | 2005-12-06 |
| 6952824 | Multi-threaded sequenced receive for fast network port stream of packets | Donald F. Hooper, Matthew J. Adiletta | 2005-10-04 |
| 6941438 | Memory interleaving | Mark Rosenbluth | 2005-09-06 |
| 6934951 | Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section | Hugh Wilkinson, Matthew J. Adiletta, Mark Rosenbluth, Debra Bernstein, Myles Wilde | 2005-08-23 |
| 6895457 | Bus interface with a first-in-first-out memory | Debra Bernstein, Matthew J. Adiletta | 2005-05-17 |
| 6876561 | Scratchpad memory | Debra Bernstein, Matthew J. Adiletta | 2005-04-05 |
| 6868476 | Software controlled content addressable memory in a general purpose execution datapath | Mark Rosenbluth, Debra Bernstein | 2005-03-15 |