Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6976049 | Method and apparatus for implementing single/dual packed multi-way addition instructions having accumulation options | — | 2005-12-13 |
| 6965962 | Method and system to overlap pointer load cache misses | — | 2005-11-15 |
| 6957321 | Instruction set extension using operand bearing NOP instructions | — | 2005-10-18 |
| 6944750 | Pre-steering register renamed instructions to execution unit associated locations in instruction cache | — | 2005-09-13 |
| 6928605 | Add-compare-select accelerator using pre-compare-select-add operation | — | 2005-08-09 |
| 6859851 | Buffer pre-loading for memory service interruptions | — | 2005-02-22 |