Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6954848 | Marking in history table instructions slowable/delayable for subsequent executions when result is not used immediately | Ryan Rakvic, Christopher B. Wilkerson, Bryan Black, John Shen, Edward A. Brekelbaum | 2005-10-11 |
| 6938126 | Cache-line reuse-buffer | Alejandro Ramirez, Hong Wang, John Shen | 2005-08-30 |
| 6931559 | Multiple mode power throttle mechanism | James S. Burns, Stefan Rusu, David J. Ayers, Marsha Eng, Vivek Tiwari | 2005-08-16 |
| 6928645 | Software-based speculative pre-computation and multithreading | Hong Wang, Jamison D. Collins, John Shen, Bryan Black, Perry Wang +1 more | 2005-08-09 |
| 6904502 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Greg Mathews, Chakravarthy Kosaraju | 2005-06-07 |
| 6857051 | Method and apparatus for maintaining cache coherence in a computer system | Vinod Sharma | 2005-02-15 |
| 6839814 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Greg Mathews, Chakravarthy Kosaraju | 2005-01-04 |