Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6981072 | Memory management in multiprocessor system | Michael Norman Day, Harm Peter Hofstee, Charles Ray Johns, David Shippy, Thuong Quang Truong | 2005-12-27 |
| 6970982 | Method and system for maintaining coherency in a multiprocessor system by broadcasting TLB invalidated entry instructions | Erik R. Altman, Peter G. Capek, Michael K. Gschwind, Harm Peter Hofstee, Ravi Nair +2 more | 2005-11-29 |
| 6961820 | System and method for identifying and accessing streaming data in a locked portion of a cache | Michael Norman Day, Charles Ray Johns, Peichun Peter Liu, David Shippy, Thuong Quang Truong | 2005-11-01 |
| 6931493 | Implementation of an LRU and MRU algorithm in a partitioned cache | Charles Ray Johns, Peichun Peter Liu | 2005-08-16 |
| 6907477 | Symmetric multi-processing system utilizing a DMAC to allow address translation for attached processors | Erik R. Altman, Peter G. Capek, Michael K. Gschwind, Harm Peter Hofstee, Ravi Nair +2 more | 2005-06-14 |
| 6848044 | Circuits and methods for recovering link stack data upon branch instruction mis-speculation | Lee Evan Eisen, Balaram Sinharoy, William J. Starke | 2005-01-25 |