Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6967861 | Method and apparatus for improving cycle time in a quad data rate SRAM device | George M. Braceras | 2005-11-22 |
| 6944090 | Method and circuit for precise timing of signals in an embedded DRAM array | Darren L. Anand, John A. Fifield | 2005-09-13 |
| 6922076 | Scalable termination | George M. Braceras, Reid C. Hutchins | 2005-07-26 |
| 6915467 | System and method for testing a column redundancy of an integrated circuit memory | — | 2005-07-05 |
| 6912165 | Method for transparent updates of output driver impedance | Phillip L. Corson | 2005-06-28 |
| 6897674 | Adaptive integrated circuit based on transistor current measurements | George M. Braceras | 2005-05-24 |
| 6854041 | DRAM-based separate I/O memory solution for communication applications | James J. Covino, Kevin G. Petrunich | 2005-02-08 |