Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6941528 | Use of a layout-optimization tool to increase the yield and reliability of VLSI designs | Robert J. Allen, Jason D. Hibbeler | 2005-09-06 |
| 6904575 | Method for improving chip yields in the presence of via flaring | Robert J. Allen | 2005-06-07 |