SM

Satoshi Matsushita

NE Nec: 4 patents #5 of 878Top 1%
Brother Kogyo: 1 patents #68 of 183Top 40%
KT Kabushiki Kaisha Toshiba: 1 patents #604 of 1,959Top 35%
Overall (2005): #3,829 of 245,428Top 2%
6
Patents 2005

Issued Patents 2005

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
6970997 PROCESSOR, MULTIPROCESSOR SYSTEM AND METHOD FOR SPECULATIVELY EXECUTING MEMORY OPERATIONS USING MEMORY TARGET ADDRESSES OF THE MEMORY OPERATIONS TO INDEX INTO A SPECULATIVE EXECUTION RESULT HISTORY STORAGE MEANS TO PREDICT THE OUTCOME OF THE MEMORY OPERATION Atsufumi Shibayama, Sunao Torii, Naoki Nishi 2005-11-29
6950908 Speculative cache memory control method and multi-processor system Atsufumi Shibayama 2005-09-27
6931514 Data dependency detection using history table of entry number hashed from memory address Atsufumi Shibayama, Sunao Torii, Naoki Nishi 2005-08-16
6907517 Interprocessor register succession method and device therefor Taku Ohsawa 2005-06-14
6888332 Computer system and method of controlling rotation speed of cooling fan 2005-05-03
6879411 Facsimile system Shuji Otsuka 2005-04-12