Issued Patents 2005
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6969649 | Method of manufacturing semiconductor integrated circuit devices having a memory device with a reduced bit line stray capacity and such semiconductor integrated circuit devices | Yoshitaka Tadaki, Keizo Kawakita, Hideo Aoki, Toshikazu Kumai, Kazuhiko Saito +6 more | 2005-11-29 |